data transition | DataRecoveryUnion.com

Many factors contribute to disk drive performance. One useful measure is data throughput rate or sustained transfer rate. In general, higher data transfer rates from the disk to the computer lead to improved system performance. Data transfer rates are often quoted within the “Specifications” section of the product manuals. Yet it is important to realize that controller overhead, cable quality and termination issues (on older SCSI products) are major factors that affect sustained data transfer rates.

The following specifications are from an older SCSI hard drive. These numbers are used for example, but the same calculations apply to ATA drives. Notice that the internal data transfer rate is listed as sustained, while the external data transfer rate is listed as burst.

INTERNAL DATA TRANSFER RATE (Megabits/sec.)____194 to 340 (sustained)

EXTERNAL DATA TRANSFER RATE – Buffer to SCSI controller (Megabytes/Sec)___Ultra160/m 160 MB/Sec. (burst)

As there are 8 bits to a byte, and 8 Megabits (Mb) to a Megabyte (MB), we divide 194 Mb’s/sec. by 8 to get 24.25 Megabytes/sec. The drive should sustain a transfer rate of 24.25 MB/sec. from the drive platters to the read/write heads, even under the worst possible conditions. The lower number of the range measures data transfer from the inner diameter of the drive platters, where there are the least amount of sectors per track. The higher number of the range measures data transfer from the outer diameter of the drive platters, where the number of sectors is higher per track. Using the higher number of the range (340), the result is 42.5 MB/Sec.

We then have a data rate in Megabytes, of 24.25 to 42.5 MB/sec. Since this is an ‘internal’ data transfer rate, consider it as the raw data rate. Some of this internal rate is lost when translating to the user data rate, because this raw data includes coding overhead that adds length to the user’s data. Add a 25% allowance (more for some drives) for system overhead. In the case of this older SCSI drive, the overhead is approximately 30%. The sustained (user) data rates are actually listed at 17 to 29 MB/Sec. For drives where only the internal data rate is listed, the formula ([Internal rate in Mb/8] x .75 = Approx. data rate in MB ) is used to develop an approximate user data rate.

Most of the time you won’t be getting the lowest sustained transfer performance or the highest, so we should find an average. Using the average of the sustained transfer rates ([17+29]/2=23), you receive an expected average sustained data transfer rate of 23 Mbytes/sec.

It’s very important to realize how these numbers are presented. The internal data rate shown here is expressed in Megabits/sec, the user data rate is written in Megabytes/sec. Certainly, we can tell you, assuming your SCSI (or ATA) subsystem is configured correctly, what your expected sustained transfer rates should be. In this case, a sustained transfer rate of 17 MBytes/sec. to 29MBytes/sec. is acceptable. Your transfer rates may be higher–or lower.

If your sustained user data rates are lower than expected, this indicates a bottleneck in the system. A failing device, improper configuration, and termination issues are leading causes for poor performance. Be aware that transfer rates can be reduced by several issues–poor quality cables, improper cable routing (causes signal reflection), SCSI Single Ended devices on an LVD SCSI bus, host limitations and more.

While you might expect to see 320 MB/sec. transfer from your SCSI Ultra 320 devices, or 300 MB/sec. from a SATA drive, know that these specifications are the burst rate–what the drive’s cache memory buffer can process under the absolute perfect combination of drive, cable, and hard drive controller conditions. Even ambient temperature affects transfer rates. This is not the sustained transfer rate of the drive. It’s what the input/output subsystem is capable of handling. For hard drives, sustained transfer rates are an important benchmark. Only when combining several high-speed drives together (in a performance RAID array), does one approach ‘bus saturation’ speeds.

Data Recovery

Data clock recovery circuit

DATARECOVERYUNION.COM16 years ago12 years ago16 mins

1. A variable phase oscillator comprising:
an oscillator having a substantially fixed frequency output signal;

means for periodically generating coded phase values of said oscillator output signal, said generating means including means for quantizing the phase value of said oscillator output signal into a predetermined number of phase steps;

a source of a prescribed phase value; and

means for comparing said periodically generated coded phase values and said prescribed phase value to periodically generate output pulse signals.

2. The invention as defined in claim 1 wherein the relative phase of said output pulse signals in relationship to said oscillator output signal is dependent on said prescribed phase value.

3. The invention as defined in claim 2 wherein said source of said prescribed phase value includes means for obtaining a phase value which represents the phase difference between said coded phase values and an incoming data transition.

4. The invention as defined in claim 1 wherein said source of said prescribed phase value includes means for obtaining the coded phase value being generated upon occurrence of an incoming data transition.

5. The invention as defined in claim 4 wherein said source of said prescribed phase value includes means supplied with said coded phase values and being responsive to an incoming data transition for storing the coded phase value being generated upon occurrence of said data transition and for adding a predetermined phase value to said stored coded phase value.

6. The invention as defined in claim 4 wherein said source of said prescribed phase value further includes means for adding a predetermined phase value to said obtained coded phase value.

7. The invention as defined in claim 6 wherein said means for obtaining comprises means supplied with said coded phase values and being responsive to said incoming data transition for storing the coded phase value being generated upon occurrence of said data transition.

8. The invention as defined in claim 7 wherein said predetermined phase value is dependent on the incoming data bit period.

9. Data clock recovery apparatus comprising:
an oscillator having a substantially fixed frequency output signal;

means for periodically generating coded phase values of said oscillator output signal, said generating means including means for quantizing said oscillator output signal into a predetermined number of phase steps;

means supplied with said coded phase values and being responsive to an incoming data transition for generating a prescribed phase value in predetermined relationship to a coded phase value being generated upon the occurrence of said data transition; and

means for comparing said periodically generated coded phase values with said prescribed phase value to generate periodically clock recovery pulse signals.

10. The invention as defined in claim 9 wherein said means for generating said prescribed phase value includes means supplied with said periodically generated coded phase values and being responsive to an incoming data transition for storing the coded phase value being generated upon occurrence of said data transition and for adding a predetermined phase value to said stored coded phase value.

11. The invention as defined in claim 9 wherein said means for generating said prescribed phase value comprises means supplied with said periodically generated coded phase values and being responsive to an incoming data transition for storing the coded phase value being generated upon occurrence of said data transition and means for adding a predetermined phase value to said stored coded phase value.

12. The invention as defined in claim 11 wherein said coded phase values are coded in a Gray-code format.

13. The invention as defined in claim 11 wherein said predetermined phase value is selected in predetermined relationship to the incoming data bit period.

14. The invention as defined in claim 13 wherein said comparing means generates a clock recovery pulse when said supplied coded phase value equals said prescribed phase value.

Sustained Data Transfer Rates For SCSI Hard Drive

Data clock recovery circuit